VERA Schematic Reviewer

OVERVIEW

VALYDATE VERA IS A POWERFUL AND DETAILED SCHEMATIC REVIEWER. VERA FULLY INSPECTS 100% OF THE NETS ON A SCHEMATIC USING PRE-DEFINED CHECKS AND AN EXTENSIVE INTELLIGENT MODEL COMPONENT LIBRARY.

Powered by Valydate’s patented verification engine, VERA saves design teams hundreds of hours of visual inspection and lab debug time by automating 100+ proprietary checks for each net within a schematic. These checks execute rapidly prior to your schematic freeze milestone, such that layout may commence with highest confidence of 1st pass success.

Download VERA brochure here.

Schematic Integrity Analysis is performed in parallel with design schematic capture. It can also be performed on electronic designs after they have been released into the market to improve the quality of the electronic design, to increase yield and to decrease product returns.

Valydate VERA - Schematic Integrity Analyser

KEY FEATURES

  • Interoperability with all major schematic capture tools
  • Multi-board interconnect analysis
  • Full inspection of 100% of nets in a schematic
  • 100+ built-in checks
  • Intelligent results post-processing
  • Extensive intelligent model library included with VERA
  • Easy setup and intuitive operation
  • Ability to create custom device model
  • Automated custom FPGA model importation
 

KEY BENEFITS

VERA SYSTEMICALLY IMPROVES THE BUSINESS PERFORMANCE OF ELECTRONIC DESIGN TEAMS. THIS SOLUTION FOCUSES ON THE EARLIEST POSSIBLE OPTIMIZATION OF DESIGN QUALITY. LEADING TO:

  • Reduced hardware spins which lead to faster time-to-market
  • Reduction in development, testing and warranty costs
  • Faster integration to high yield manufacturing
  • Improved yield and decreased field returns
  • Superior product quality
 

SELECT EXAMPLES OF SCHEMATIC CHECKS PERFORMED

  • Pin Voltage Parametric Verification for maximum, minimum and logic thresholds
  • Bus flip errors (MSB to LSB, TX and RX errors)
  • Full Multi-Board and Backplane Interface Verification
  • Pin Function Compatibility Tests
  • Poor Design Practice Checks
    (ie: using pull-ups, pull downs when needed...)
  • Power/Ground Plane Connection Verification
  • Component Power Checks
  • Multiple or Missing Power Supplies (on a net)
  • Differential Pin Verification
  • Unconnected Nets or Bus Detection
  • Off-Board Nets Detection
  • Symbol Mismatch (to Datasheet)
  • Driver/Receiver Technology Matching
  • Diode Orientation Verification
  • Driver/Receiver Function Matching
  • Power/Ground/Open Collector/Drain Shorts
  • Capacitor Decoupling Sufficiency Checks
  • Capacitor Voltage Derating (to client rules)
  • Redundant Resistors (on a net detection)
  • Open Collector/Drain Verification
  • Overloaded Pins Identification
  • Unconnected Mandatory Pins Identification
  • Nets Missing Driver
  • Nets Missing Receiver
 

And many more…




Testimonials

"Valydates analysis service identified real errors before we committed our design. This helped us get to market faster with a higher quality product."

Ben Brown
VP Engineering, LTX-Credence

“Valydates Schematic Integrity service has been very useful; not only in finding some issues, but also as a thorough check in verifying that other parts of the design have been done correctly.”

Milan Fait, Alcatel-Lucent HW Design

“A must have process before fabrication to avoid unnecessary re-spin”

VP of Digital Hardware Eng., ATE Solutions Provider

“The service provided to us by Valydate helps us reduce the risk of going in layout with a complex design strategic to our companys growth. Some findings in the report will save us precious time in debugging and we are confident that this first layout will even be the version released to production.”

Andre Lessard, Hardware Manager, Commscope